1. Field of the Invention
This invention is in the field of microcontrollers and methods therefor and, more particularly, is a microcontroller having an n-bit architecture (i.e., data bus width) with less than n Input/Output (I/O) pins and a method therefore.
2. Description of the Related Art
Microcontrollers are widely known and used in many different applications. A typical architecture used in microcontrollers today is the 8-bit architecture (i.e., the data bus width of the microcontroller is 8 bits wide). One problem with this and other sizes of microcontrollers is that to support an n-bit architecture, greater than n pins are required to be connected to the microcontroller. By reducing the number of pins required to support an n-bit, or more particularly, an 8-bit microcontroller, the overall cost of using the device is reduced, and limited space is conserved. Therefore, there existed a need to provide a microcontroller having an n-bit architecture with less than or equal to n pins and a method therefor.
An object of the present invention is to provide a microcontroller having an n-bit architecture with less than or equal to n pins coupled to the microcontroller and a method therefor.
Another object of the present invention is to provide a microcontroller having an n bit architecture with the number of I/O pins less than n and a method therefor.
Yet another object of the present invention is to provide a microcontroller package with pins for performing multiple functions and a method therefor.
Still another object of the present invention is to provide a microcontroller with n-bit data processing capability and fewer than n I/O pins and a method therefor.
According to the present invention, an Integrated Circuit (IC) package is disclosed comprising, in combination, an IC chip with a microcontroller therein having an n-bit data bus, and up to n pins electrically coupled to the microcontroller. The IC package further comprises control register means coupled to the microcontroller for receiving enable and disable signals. Pin function configuration means are also included coupled to the control register means for determining a function for a corresponding one of the n pins. The pin function configuration means comprises at least one functional block means coupled to the control register means for determining a function for a corresponding pin. The pin function configuration means may comprise a plurality of the functional block means each coupled to the control register means and to a corresponding pin of the n pins for determining a different function for the corresponding one of the n pins. The control register means provides independent control line means to each functional block means for transferring to each function block means one of the enable and the disable signals. Only one of the functional block means per pin is enabled at a time by the enable signal to configure a corresponding pin for a function associated with the enabled functional block means. Each functional block means is coupled to a corresponding one of the n pins and to the microcontroller for transferring data between the corresponding pin and the microcontroller when a particular one of the functional blocks is enabled. Additionally, the n pins include a number of Input/Output (I/O) type pins less than n.
Alternatively, a method of operating an Integrated Circuit (IC) package is disclosed comprising the steps of providing an IC chip with a microcontroller therein having an n-bit data bus, and providing up to n pins electrically coupled to the microcontroller.
The foregoing and other objects, features, and advantages of the invention will be apparent from the following, more particular, description of the preferred embodiments of the invention, as illustrated in the accompanying drawing.